Power-stepping idea for dual-core

[jasong]

How about a dual-core cpu with power-stepping technology, but the second core only activates if the first one tells it to? Basically, you'd have an energy efficient cpu with a second one as backup for things like games, media conversion and, of course, DC.

What do you guys think? Maybe something that will show up in the next couple years? The real question is whether it's too generic an idea to patent. Probably you'd have to come up with an actual blueprint to patent the idea.

[Scoofy12]

i'm pretty sure i've seen a research paper in one of the computer architecture conferences that talked about that, or heard someone talking about it somewhere... reducing power and heat are big topics in computer architecture these days, and multicore processors are of course a big part of that.

in fact, one of the architecture guys here at purdue does research in that area... he had a recent paper with an alternative solution to completely disabling a core... basically involving the OS migrating threads off of cores that get too hot... heres the link if youre interested: http://www.ece.purdue.edu/~vijay/papers/2004/heat-and-run.pdf

oh, and its probably not patentable... well it might be, since we have such stupid patents coming out of USPTO these days, but i'm sure it would be pretty easy to find prior art by now.

[Shish]

Both AMD and Intel are looking at this for next gen notebook cpu`s and some server, low power cpu`s.
IBM already do a similar thing in modern mainframes where upto 32 or more cpus are fired up as necessary according to load requirements. Their new series of multi core cpus can also be configured to do this (think it`s on the 900 range as well as some others).
Have a spoach around IBM sometime on what a modern mainframe can do if you`ve got oodles of cash or a big budget.
Or just hunt around some of the whitepapers at either Intel or AMD. You don`t have to be able to understand all the language and terms used to be able to pick out some interesting stuff.

[jasong]

Thanks for the link, Scoofy12. I've never encountered so many big words I could actually understand in one place. Apparently, in the future it will be wise to optimize for heat dissippation, as well as efficiency of instructions.

[Scoofy12]

indeed, this is already happening. intel is soon rolling out server processors based on the pentium M microarchitecture (in turn based on the P6 (pentium pro, pII/pIII) architecture, probably one of the best things that ever came out of intel) for the very reason that it's much more power-efficient than the P4 design. also i noticed that lately sun has been heavily advertising how much more efficient its Opteron servers are than Dell's Xeons.

[Chuck]

Don't know if any of you saw the post, but Cray Research (SGI), is also using the Opteron in the same manner.

The near-identical NUMA architectures work well together.

I'm very much interested in seeing what kind of vectorization comes out with the next processors (K10's) since the K9s basically were overtaken by the extreme success of the K8.

I do know the K10 will be quad-core and should (if their plans hold... probably also due to heat) be both gangable (merged as 1 super-wide core) or run as independent cores at up to somewhere around 5-6Ghz on 65nm technology at power / heat levels similar to what we are seeing now. I can't quite figure out how much larger the die has to be to get 4 full cores w/ 1mb caches in there AND keep the power / heat down in the target 100 watt range. This will definately be interesting with the quad-channel memory bus.

I will do my usual 'pinging' in Boston and see what I get... The K10 has been working for some time now. I would hope it's stable and near 'market ready'.

I know of some folks that already have samples.


If anyone knows... please do chime in... I am already making plans for my purchses for the next 12 months.